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Lee, B. G., Assefa, S., Green, W. M. J., Min Yang, Schow, C. L., Jahnes, C. V., et al. (2011). Multichannel high-bandwidth coupling of ultradense silicon photonic waveguide array to standard-pitch fiber array. J. Lightwave Technol., 29(4), 475–482.
Abstract: A multichannel tapered coupler interfacing standard 250-μm-pitch low-numerical-aperture (NA) polarization-maintaining fiber arrays with ultradense 20- μm-pitch high-NA silicon waveguides is designed and fabricated. The coupler is based on an array of 12 dual-core glass waveguides on 250-μ m pitch that are tapered to a 20- μm pitch, simultaneously providing both pitch and spot-size conversion. At the wide end, the inner core matches the NA and mode profile of standard single-mode fiber. When drawn and tapered, the inner core “vanishes†and the outer core, surrounded by the clad, matches the NA and mode profile of the on-chip photonic waveguide. Ultradense high-efficiency coupling to an array of Si photonic waveguides is demonstrated using a 12-channel polarization-maintaining-fiber pigtailed tapered coupler. Coupling to Si waveguides is facilitated using SiON spot-size converters integrated into the Si photonic IC to provide 2-3-μm mode field diameters compatible with the tapered coupler. The tapered coupler achieves <; 1 dB coupling losses to photonic waveguides. Furthermore, eight-channel coupling is shown with less than -35 dB crosstalk between channels. Finally, a 640-Gb/s wavelength-division-multiplexing signal is coupled into four waveguides occupying 80 μm of chip edge, providing 160-Gb/s per-channel bandwidths.
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Lee, B. G., Doany, F. E., Assefa, S., Green, W., Yang, M., Schow, C. L., et al. (2010). 20-μm-pitch eight-channel monolithic fiber array coupling 160 Gb/s/channel to silicon nanophotonic chip. In Conf. OFC/NFOEC (pp. 1–3).
Abstract: A multichannel tapered coupler interfacing standard 250-μm-pitch low-NA polarization-maintaining fiber arrays with ultra-dense 20-μm-pitch high-NA silicon waveguides is designed, fabricated, and tested, demonstrating coupling losses below 1 dB and injection bandwidths of 160 Gb/s/channel.
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Manus, M. K. M., Kash, J. A., Steen, S. E., Polonsky, S., Tsang, J. C., Knebel, D. R., et al. (2000). PICA: Backside failure analysis of CMOS circuits using picosecond imaging circuit analysis. Microelectronics Reliability, 40, 1353–1358.
Abstract: Normal operation of complementary metal-oxide semiconductor (CMOS) devices entails the emission of picosecond pulses of light, which can be used to diagnose circuit problems. The pulses that are observed from submicron sized field effect transistors (FETs) are synchronous with logic state switching. Picosecond Imaging Circuit Analysis (PICA), a new optical imaging technique combining imaging with timing, spatially resolves individual devices at the 0.5 micron level and switching events on a 10 picosecond timescale. PICA is used here for the diagnostics of failures on two VLSI microprocessors.
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