TY  - JOUR
AU  - Manus, M. K. Mc
AU  - Kash, J. A.
AU  - Steen, S. E.
AU  - Polonsky, S.
AU  - Tsang, J. C.
AU  - Knebel, D. R.
AU  - Huott, W.
PY  - 2000
DA  - 2000//
TI  - PICA: Backside failure analysis of CMOS circuits using picosecond imaging circuit analysis
T2  - Microelectronics Reliability
JO  - Microelectronics Reliability
SP  - 1353
EP  - 1358
VL  - 40
KW  - SSPD
KW  - CMOS testing
AB  - Normal operation of complementary metal-oxide semiconductor (CMOS) devices entails the emission of picosecond pulses of light, which can be used to diagnose circuit problems. The pulses that are observed from submicron sized field effect transistors (FETs) are synchronous with logic state switching. Picosecond Imaging Circuit Analysis (PICA), a new optical imaging technique combining imaging with timing, spatially resolves individual devices at the 0.5 micron level and switching events on a 10 picosecond timescale. PICA is used here for the diagnostics of failures on two VLSI microprocessors.
UR  - https://doi.org/10.1016/S0026-2714(00)00137-2
DO  - 10.1016/S0026-2714(00)00137-2
N1  - exported from refbase (https://db.rplab.ru/refbase/show.php?record=1054), last updated on Sat, 17 Oct 2015 22:54:06 -0500
ID  - Manus_etal2000
ER  -